This invention relates to Digital-to-Analog Converter (hereinafter xe2x80x9cDACxe2x80x9d) technology. Specifically, the invention proposes a system for improving the performance of a DAC.
FIG. 6 shows a single-bit cell in a standard CMOS current-steered Digital-to-Analog Converter (DAC). In this circuit, m1 and m2 form a cascode current source, where the DC bias voltages VB1 and VB2 are generated by a dedicated bias generator (not shown). The DC current which is output by this current source is xe2x80x9csteeredxe2x80x9d to either the RLP or the RLN load resistor, thus either increasing or decreasing the differential output voltage VOUT, by a source-coupled differential pair consisting of transistors m3 and m4.
In a xe2x80x9cthermometer-codedxe2x80x9d DAC, with an N-bit digital input, 2Nxe2x88x921 of the bit cells shown in FIG. 1 are connected in parallel; See xe2x80x9cAn 80 MHz 8-bit CMOS D/A Converterxe2x80x9d, by T. Miki et. al., IEEE Journal Solid-State Circuits, vol. SC-21, No. 6, December 1986. In this case, each bit cell represents one least-significant bit (LSB). Thus, if the DAC input increases or decreases by one LSB, then the logical input to one of the bit cells, BIT, is either asserted or de-asserted in order to increase or decrease the output voltage by one LSB (1/(2Nxe2x88x921) times its peak-to-peak full scale value). Other known DAC architectures combine bit cells with scaled current sources and scaled device sizes to produce the same DAC functionality with fewer bit cells (for example, an N-bit xe2x80x9cbinary-weightedxe2x80x9d DAC requires only N bit cells; See xe2x80x9cPrinciples of Data Conversion System Designxe2x80x9d, by Behzad Razavi, 1995, IEEE Press, p. 90. Although each of these architectures has advantages and disadvantages, the performance of each is fundamentally limited by the performance of a single-bit cell.
Accordingly, this invention improves the performance of a single-bit cell in a DAC.
This invention improves the performance of a single-bit cell in a DAC by decoupling the voltage swing across the load resistors from the output of the current steering device. The invention provides for an electrical circuit including a first load resistor R1 and a second load resistor R2, a current steering circuit, and a decoupling circuit operably coupled between the current steering circuit and the resistors R1, R2. The current steering circuit steers at least part of a current I1 through a circuit path towards either the first resistor R1 or the second resistor R2. The decoupling circuit decouples voltage swings across the load resistors R1, R2 from the current steering circuit.